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| (R) ISL89400, ISL89401 Data Sheet December 11, 2007 FN6614.0 100V, 1.25A Peak, High Frequency Half-Bridge Drivers The ISL89400, ISL89401 are 100V, high frequency, half-bridge N-Channel power MOSFET driver ICs. They are based on the popular HIP2100, HIP2101 half-bridge drivers, but offer several performance improvements. The ISL89400 has additional input hysteresis for superior operation in noisy environments and the inputs of the ISL89401 (like those of the ISL89400) can now safely swing to the VDD supply rail. Finally, both parts are available in a very compact 9 Ld DFN package to minimize the required PCB footprint. Features * Drives N-Channel MOSFET Half-Bridge * Space Saving DFN Package * DFN Package Compliant with 100V Conductor Spacing Guidelines per IPC-2221 * Pb-Free (RoHS Compliant) * Bootstrap Supply Max Voltage to 114VDC * On-Chip 1 Bootstrap Diode * Fast Propagation Times for Multi-MHz Circuits * Drives 1nF Load with Typical Rise/Fall Times of 16ns Ordering Information PART NUMBER PART TEMP. (Note) MARKING RANGE (C) ISL89400AR3Z* 9400 ISL89401AR3Z* 9401 PACKAGE (Pb-Free) PKG. DWG. # * CMOS Compatible Input Thresholds (ISL89400) * 3.3V/TTL Compatible Input Thresholds (ISL89401) * Independent Inputs Provide Flexibility * No Start-up Problems * Outputs Unaffected by Supply Glitches, HS Ringing Below Ground or HS Slewing at High dV/dt * Low Power Consumption * Wide Supply Voltage Range (9V to 14V) * Supply Undervoltage Protection * 4.0 Typical Output Pull-up/Pull-down Resistance -40 to +125 9 Ld 3x3 DFN L9.3x3 -40 to +125 9 Ld 3x3 DFN L9.3x3 *Add "-T" suffix for tape and reel. Please refer to TB347 for details on reel specifications. NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020. Applications Pinout ISL89400, ISL89401 (9 LD DFN) TOP VIEW VDD 1 9 LO 8 VSS HB HO HS 2 3 4 EPAD 7 LI 6 HI 5 NC * Telecom Half-Bridge Converters * Telecom Full-Bridge Converters * Two-Switch Forward Converters * Active-Clamp Forward Converters * Class-D Audio Amplifiers NOTE: EPAD = Exposed PAD. 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright (c) Intersil Americas Inc. 2007. All Rights Reserved. All other trademarks mentioned are the property of their respective owners. ISL89400, ISL89401 Application Block Diagram +12V +100V VDD HB SECONDARY CIRCUIT HI CONTROL PWM CONTROLLER LI DRIVE HI HO HS DRIVE LO ISL89400 ISL89401 VSS LO REFERENCE AND ISOLATION Functional Block Diagram HB VDD UNDERVOLTAGE LEVEL SHIFT DRIVER HS HI ISL89401 HO UNDERVOLTAGE ISL89401 DRIVER LI VSS LO EPAD (DFN PACKAGE ONLY) *EPAD = EXPOSED PAD. THE EPAD IS ELECTRICALLY ISOLATED FROM ALL OTHER PINS. FOR BEST THERMAL PERFORMANCE CONNECT THE EPAD TO THE PCB POWER GROUND PLANE. 2 FN6614.0 December 11, 2007 ISL89400, ISL89401 +48V +12V PWM ISL89400 ISL89401 SECONDARY CIRCUIT ISOLATION FIGURE 1. TWO-SWITCH FORWARD CONVERTER +48V +12V SECONDARY CIRCUIT PWM ISL89400 ISL89401 ISOLATION FIGURE 2. FORWARD CONVERTER WITH AN ACTIVE-CLAMP 3 FN6614.0 December 11, 2007 ISL89400, ISL89401 Absolute Maximum Ratings Supply Voltage, VDD, VHB - VHS (Notes 1, 2) . . . . . . . -0.3V to 18V LI and HI Voltages (Note 2) . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V Voltage on LO (Note 2) . . . . . . . . . . . . . . . . . . -0.3V to VDD + 0.3V Voltage on HO (Note 2) . . . . . . . . . . . . . . VHS - 0.3V to VHB + 0.3V Voltage on HS (Continuous) (Note 2) . . . . . . . . . . . . . . -1V to 110V Voltage on HB (Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 118V Average Current in VDD to HB Diode . . . . . . . . . . . . . . . . . . 100mA Thermal Information Thermal Resistance (Typical) JA (C/W) JC (C/W) DFN (Notes 3, 4) . . . . . . . . . . . . . . . . . 55 7.5 Max Power Dissipation at +25C in Free Air (Notes 3, 4) . . . . . 2.27W Storage Temperature Range . . . . . . . . . . . . . . . . . .-65C to +150C Junction Temperature Range. . . . . . . . . . . . . . . . . .-55C to +150C Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/Pb-FreeReflow.asp Maximum Recommended Operating Conditions Supply Voltage, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9V to 14V Voltage on HS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -1V to 100V Voltage on HS . . . . . . . . . . . . . . .(Repetitive Transient) -5V to 105V Voltage on HB . . VHS + 8V to VHS + 14V and VDD - 1V to VDD + 100V HS Slew Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . <50V/ns CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty. NOTES: 1. The ISL89400 and ISL89401 are capable of derated operation at supply voltages exceeding 14V. Figure 22 shows the high-side voltage derating curve for this mode of operation. 2. All voltages referenced to VSS, unless otherwise specified. 3. JA is measured in free air with the component mounted on a high effective thermal conductivity test board with "direct attach" features. 4. For JC, the "case temp" is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379 for details. Electrical Specifications PARAMETERS SUPPLY CURRENTS VDD Quiescent Current VDD Quiescent Current VDD Operating Current VDD Operating Current Total HB Quiescent Current Total HB Operating Current HB to VSS Current, Quiescent HB to VSS Current, Operating INPUT PINS Low Level Input Voltage Threshold Low Level Input Voltage Threshold VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified. TJ = +25C SYMBOL TEST CONDITIONS MIN TYP MAX TJ = -40C to +125C MIN MAX UNITS IDD IDD IDDO IDDO IHB IHBO IHBS IHBSO ISL89400; LI = HI = 0V ISL89401; LI = HI = 0V ISL89400; f = 500kHz ISL89401; f = 500kHz LI = HI = 0V f = 500kHz LI = HI = 0V; VHB = VHS = 114V f = 500kHz; VHB = VHS = 114V - 0.1 0.3 1.6 1.9 0.1 2.0 0.05 0.9 0.25 0.45 2.2 2.5 0.15 2.5 1 - - 0.3 0.55 2.7 3 0.2 3 10 - mA mA mA mA mA mA A mA VIL VIL VIH VIH VIHYS RI ISL89400 ISL89401 ISL89400 ISL89401 ISL89400 3.7 1.4 - 4.4 1.8 6.6 1.8 2.2 210 7.4 2.2 - 2.7 1.2 100 8.4 2.4 500 V V V V V k High Level Input Voltage Threshold High Level Input Voltage Threshold Input Voltage Hysteresis Input Pull-down Resistance UNDER VOLTAGE PROTECTION VDD Rising Threshold VDD Threshold Hysteresis HB Rising Threshold HB Threshold Hysteresis VDDR VDDH VHBR VHBH 6.8 6.2 - 7.3 0.6 6.9 0.6 7.8 7.5 - 6.5 5.9 - 8.1 7.8 - V V V V 4 FN6614.0 December 11, 2007 ISL89400, ISL89401 Electrical Specifications PARAMETERS BOOT STRAP DIODE Low Current Forward Voltage High Current Forward Voltage Dynamic Resistance LO GATE DRIVER Low Level Output Voltage High Level Output Voltage Peak Pull-Up Current Peak Pull-Down Current HO GATE DRIVER Low Level Output Voltage High Level Output Voltage Peak Pull-up Current Peak Pull-down Current VOLH VOHH IOHH IOLH IHO = 100mA IHO = -100mA, VOHH = VHB - VHO VHO = 0V VHO = 12V 0.4 0.4 1.25 1.25 0.5 0.5 0.7 0.7 V V A A VOLL VOHL IOHL IOLL ILO = 100mA ILO = -100mA, VOHL = VDD - VLO VLO = 0V VLO = 12V 0.4 0.4 1.25 1.25 0.5 0.5 0.7 0.7 V V A A VDL VDH RD IVDD-HB = 100A IVDD-HB = 100mA IVDD-HB = 100mA 0.5 0.7 0.8 0.6 0.9 1 0.7 1 1.5 V V VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified. (Continued) TJ = +25C SYMBOL TEST CONDITIONS MIN TYP MAX TJ = -40C to +125C MIN MAX UNITS Switching Specifications VDD = VHB = 12V, VSS = VHS = 0V, No Load on LO or HO, Unless Otherwise Specified TEST CONDITIONS TJ = +25C MIN 1 1 CL = 1nF CL = 0.1F TYP 34 31 39 39 8 6 16 0.8 10 MAX 50 50 50 50 1.0 TJ = -40C to +125C MIN MAX 60 60 60 60 16 16 1.2 50 UNITS ns ns ns ns ns ns ns us ns ns PARAMETERS Lower Turn-off Propagation Delay (LI Falling to LO Falling) Upper Turn-off Propagation Delay (HI Falling to HO Falling) Lower Turn-on Propagation Delay (LI Rising to LO Rising) Upper Turn-on Propagation Delay (HI Rising to HO Rising) Delay Matching: Upper Turn-off to Lower Turn-on Delay Matching: Lower Turn-off to Upper Turn-on Either Output Rise/Fall Time (10% to 90%/90% to 10%) Either Output Rise/Fall Time (3V to 9V/9V to 3V) Minimum Input Pulse Width that Changes the Output Bootstrap Diode Turn-on or Turn-off Time SYMBOL tLPHL tHPHL tLPLH tHPLH tMON tMOFF tRC,tFC tR,tF tPW tBS 5 FN6614.0 December 11, 2007 ISL89400, ISL89401 Pin Descriptions SYMBOL VDD HB HO HS HI LI VSS LO NC EPAD DESCRIPTION Positive supply to lower gate driver. Bypass this pin to VSS. High-side bootstrap supply. External bootstrap capacitor is required. Connect positive side of bootstrap capacitor to this pin. Bootstrap diode is on-chip. High-side output. Connect to gate of high-side power MOSFET. High-side source connection. Connect to source of high-side power MOSFET. Connect negative side of bootstrap capacitor to this pin. High-side input. Low-side input. Chip negative supply, which will generally be ground. Low-side output. Connect to gate of low-side power MOSFET. No connect. Exposed pad. Connect to ground or float. The EPAD is electrically isolated from all other pins. Timing Diagrams LI HI, LI tHPLH , tLPLH HO, LO tHPHL, tLPHL HI LO tMON HO tMOFF FIGURE 3. PROPAGATION DELAYS FIGURE 4. DELAY MATCHING Typical Performance Curves 10.0 10.0 T = -40C IDDO (mA) IDDO (mA) T = +25C 1.0 T = +125C T = +25C 1.0 T = +125C T = -40C T = +150C 0.1 10k 100k FREQUENCY (Hz) 1M 0.1 10k T = +150C 100k FREQUENCY (Hz) 1M FIGURE 5. ISL89400 IDD OPERATING CURRENT vs FREQUENCY FIGURE 6. ISL89401 IDD OPERATING CURRENT vs FREQUENCY 6 FN6614.0 December 11, 2007 ISL89400, ISL89401 Typical Performance Curves 10.00 (Continued) 10.00 T = +125C T = -40C 1.00 IHBO (mA) IHBO (mA) T = +25C 1.00 T = +150C 0.10 T = -40C T = +25C 100k FREQUENCY (Hz) 1M 0.01 10k 100k FREQUENCY (Hz) 1M 0.10 T = +125C 0.01 10k T = +150C FIGURE 7. IHB OPERATING CURRENT vs FREQUENCY FIGURE 8. IHBS OPERATING CURRENT vs FREQUENCY 500 450 VOLL, VOLH (mV) 400 350 300 250 200 150 -50 0 VDD = VHB = 9V VOLL, VOLH (mV) 450 400 VDD = VHB = 9V VDD = VHB = 12V 350 300 250 200 150 VDD = VHB = 12V VDD = VHB = 14V 50 TEMPERATURE (C) 100 150 VDD = VHB = 14V -50 0 50 TEMPERATURE (C) 100 150 FIGURE 9. HIGH LEVEL OUTPUT VOLTAGE vs TEMPERATURE FIGURE 10. LOW LEVEL OUTPUT VOLTAGE vs TEMPERATURE 7.6 VDDR 0.60 VHBH 0.55 VDDH, VHBH (V) VDDR, VHBR (V) 7.4 7.2 VHBR 0.50 7.0 0.45 VDDH 0.40 6.8 -50 0 50 TEMPERATURE (C) 100 150 -50 0 50 TEMPERATURE (C) 100 150 FIGURE 11. UNDERVOLTAGE LOCKOUT THRESHOLD vs TEMPERATURE FIGURE 12. UNDERVOLTAGE LOCKOUT HYSTERESIS vs TEMPERATURE 7 FN6614.0 December 11, 2007 ISL89400, ISL89401 Typical Performance Curves 55 tLPLH, tLPHL, tHPLH, tHPHL (ns) 50 45 40 35 30 25 20 tHPHL -50 0 50 TEMPERATURE (C) 100 150 tLPHL tHPLH tLPLH (Continued) tLPLH, tLPHL, tHPLH, tHPHL (ns) 55 50 45 40 35 30 25 20 -50 0 tHPHL 50 TEMPERATURE (C) tLPHL tHPLH tLPLH 100 150 FIGURE 13. ISL89400 PROPAGATION DELAYS vs TEMPERATURE FIGURE 14. ISL89401 PROPAGATION DELAYS vs TEMPERATURE 10 9 tMON, tMOFF (ns) 8 7 6 5 4 3 -50 0 50 TEMPERATURE (C) tMON 100 150 tMOFF tMON, tMOFF (ns) 10 9 8 7 6 5 4 3 2 -50 0 tMOFF 50 TEMPERATURE (C) 100 150 tMON FIGURE 15. ISL89400 DELAY MATCHING vs TEMPERATURE FIGURE 16. ISL89401 DELAY MATCHING vs TEMPERATURE 1.25 1.00 IOHL, IOHH (A) 0.75 0.50 0.25 0 IOLL, IOLH (A) 0 2 4 6 VLO, VHO (V) 8 10 12 1.25 1.00 0.75 0.50 0.25 0 0 2 4 6 VLO, VHO (V) 8 10 12 FIGURE 17. PEAK PULL-UP CURRENT vs OUTPUT VOLTAGE FIGURE 18. PEAK PULL-DOWN CURRENT vs OUTPUT VOLTAGE 8 FN6614.0 December 11, 2007 ISL89400, ISL89401 Typical Performance Curves 260 240 220 200 180 160 140 120 100 80 60 40 20 0 (Continued) 340 320 300 280 260 240 220 200 180 160 140 120 100 80 60 40 20 0 IDD, IHB (A) IHB IDD, IHB (A) IDD IDD IHB 0 5 10 VDD, VHB (V) 15 20 0 5 10 VDD, VHB (V) 15 20 FIGURE 19. ISL89400 QUIESCENT CURRENT vs VOLTAGE FIGURE 20. ISL89401 QUIESCENT CURRENT vs VOLTAGE 1.00 FORWARD CURRENT (A) 0.10 0.01 1.10-3 1.10-4 1.10-5 1.10-6 0.3 VDD to VSS VOLTAGE (V) 120 100 80 60 40 20 0 12 13 14 15 16 0.4 0.5 0.6 0.7 0.8 FORWARD VOLTAGE (V) VHS TO VSS VOLTAGE (V) FIGURE 21. BOOTSTRAP DIODE I-V CHARACTERISTICS FIGURE 22. VHS VOLTAGE vs VDD VOLTAGE 9 FN6614.0 December 11, 2007 ISL89400, ISL89401 Dual Flat No-Lead Plastic Package (DFN) 2X 0.15 C A A D 2X 0.15 C B L9.3x3 9 LEAD DUAL FLAT NO-LEAD PLASTIC PACKAGE MILLIMETERS SYMBOL A A1 E MIN 0.80 - NOMINAL 0.90 0.20 REF MAX 1.00 0.05 NOTES - A3 b D 0.20 5 INDEX AREA TOP VIEW B 0.25 3.00 BSC 0.30 4, 7 - D2 E // 0.10 C 0.08 C 1.85 2.00 3.00 BSC 2.10 6, 7 - E2 e k 0.80 0.95 0.50 BSC 1.05 6, 7 - A C SEATING PLANE SIDE VIEW A3 0.60 0.25 0.35 9 0.45 7 2 Rev. 0 3/06 L N D2 (DATUM B) 1 D2/2 2 6 7 NOTES: 1. Dimensioning and tolerancing conform to ASME Y14.5-1994. 2. N is the number of terminals. 3. All dimensions are in millimeters. Angles are in degrees. NX k E2 5 INDEX AREA (DATUM A) 4. Dimension b applies to the metallized terminal and is measured between 0.15mm and 0.30mm from the terminal tip. 5. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be either a mold or mark feature. 6. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance. 7. Nominal dimensions are provided to assist with PCB Land Pattern Design efforts, see Intersil Technical Brief TB389. 8. COMPLIANT TO JEDEC MO-229-WEED-3 except for dimensions E2 & D2. E2/2 NX L N 7 N-1 NX b e (Nd-1)Xe REF. BOTTOM VIEW C L NX (b) 4 SECTION "C-C" CC e TERMINAL TIP (A1) 8L 4 0.10 M C A B FOR ODD TERMINAL/SIDE All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see www.intersil.com 10 FN6614.0 December 11, 2007 |
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